
NXP Semiconductors
PRTR5V0U2F; PRTR5V0U2K
Ultra low capacitance double rail-to-rail ESD protection
1.4 Quick reference data
Table 2. Quick reference data
T amb = 25 ° C unless otherwise speci?ed.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per channel
C (I/O-GND)
input/output to ground
f = 1 MHz;
-
1.0
1.5
pF
capacitance
V (I/O-GND) = 0 V
C (I/O-I/O)
input/output to input/output
f = 1 MHz;
-
0.6
-
pF
Zener diode
capacitance
V (I/O-I/O) = 0 V
V RWM
reverse standoff voltage
-
-
5.5
V
C sup
supply pin to ground
f = 1 MHz;
-
16
-
pF
capacitance
V CC = 0 V
[1]
[2]
[3]
Measured from pin 1, 3, 4 or 6 to ground.
Measured from pin 1 or 6 to pin 3 or 4.
Measured from pin 5 to ground.
2. Pinning information
Table 3.
Pinning
Pin
Symbol
Description
Simpli?ed outline
Graphic symbol
PRTR5V0U2F (SOT886)
1
I/O1
input/output 1
2
GND
ground
1
2
3
1
6
3
I/O2
input/output 2
4
5
I/O2
V CC
input/output 2
supply voltage
2
5
6
I/O1
input/output 1
6 5
bottom view
4
3
4
006aab349
PRTR5V0U2K (SOT891)
1
I/O1
input/output 1
2
GND
ground
1
2
3
1
6
3
I/O2
input/output 2
4
5
I/O2
V CC
input/output 2
supply voltage
2
5
6
I/O1
input/output 1
6 5
bottom view
4
3
4
006aab349
PRTR5V0U2F_PRTR5V0U2K_2
? NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 19 February 2009
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